Open Source IC Design
Tools Workshop

4-day workshop on Analog and Digital IC design flow using Open Source Tools

Open Source IC Design Tools Workshop

Please fill out this form to register for the Open Source IC Design Tools Workshop

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What will take place in this workshop?

  • Introduction to CMOS integrated circuits basics and Open Source tools design flow
  • Detailed illustration and hands-on experience of complete Open Source integrated circuit system design tools from Schematic to GDG and MPW prechecks
  • Tapeout submission using Open Source Skywater 130nm pdk on eFabless platform targeting Google sponsored MPW runs.

Workshop Flow

Target Audience

  • Undergraduate and graduate students interested in IC Design and having basic knowledge in electronics and industry professionals looking for IC Design skills

Price

  • USD 250 per person for the four-day workshop
    (We will contact you for payment after the submission of the registration form)

Time

  • TBA

Schedule

MAR
11
  • From 16:00 to 20:00
  • London Park

Introduction

  • Guest note
  • CMOS fabrication process
  • Open source tooIs
  • E–fabIess platform
  • Introduction: Analog & digital flow
  • Tools setup
MAR
12
  • From 16:00 to 20:00
  • London Park

Analog Design Flow

  • Schematic entry
  • Using Xschem
  • NGSpice simuIations
  • Layout design using Magic
  • DRC verification
  • LVS verification
  • Antenna ruIe checks
MAR
13
  • From 16:00 to 20:00
  • London Park

Digital Design Flow

  • OpenLane overview
  • Synthesis
  • Automatic pIacing & routing
  • CIock tree synthesis
  • Post synthesis
  • Layout simuIation
MAR
14
  • From 16:00 to 20:00
  • London Park

Signing OFF

  • Top IeveI integration
  • Submission for MPW
  • E–FabIess finaI and prechecks
  • E–FabIess tapeout jobs
  • Q&A session

Presenters

Prof. Dr. Rashad Ramzan
Professor & Director RFCS2 Lab
FAST, NUCES, ISB.
Dr. Hassan Saif
Asst. Professor at FAST,
NUCES, ISB
Engr. Hamza Atiq
Design Engineer
MS EE (IC Design)
FAST, NUCES, ISB.
Engr. Shahid Jamil
Analog IC Design Engineer
NECOP, Pakistan
Engr. M Usman
Digital IC Design Engineer
NECOP, Pakistan
Engr. Jafar
Analog IC Design Engineer
NECOP, Pakistan

Deep Experience in IC Design and TapeOut

  • Pioneer of Graduate IC design program with 44 full- time registered graduate students
  • Three designs accepted in SSCS PICO (now Chipathon) Open Source Tapeout Contest and submitted for fabrication in Nov 2021
  • Two tape-outs completed in September 2021 using TSMC 65nm node
  • Cumulative experience of over a dozen IC tape outs
  • Analog, Digital, and mixed signal design expertise on Open/Commercial Source tools.

Recent Chip Ignite Open Source Projects

Project-1: Backscattering Integration for WPT Recievers

Project-2: Bi-Directional Amplifier Architecture for Sub-6 GHz 5G

Project-3: 64-bit Fused Multiplier Adder Unit with Variable Precision

Open Source IC Design Tools Workshop

Please fill out this form to register for the Open Source IC Design Tools Workshop

Close